1. Field of the Invention
This invention relates generally to a methodology for the rapid and accurate inspection of defects detected during the manufacture of semiconductor wafers. More specifically, this invention relates to a methodology for the automatic selection of the correct review recipe for use by a review station.
2. Discussion of the Related Art
In order to remain competitive, a semiconductor manufacturer must continuously increase the performance of the semiconductor integrated circuits being manufactured and at the same time, reduce the cost of the semiconductor integrated circuits. Part of the increase in performance and the reduction in cost of the semiconductor integrated circuits is accomplished by shrinking the device dimensions and by increasing the number of circuits per unit area on an integrated circuit chip. Another part of reducing the cost of a semiconductor chip is to increase the yield. As is known in the semiconductor manufacturing art, the yield of chips (also know as die) from each wafer is not 100% because of defects occurring on die during the manufacturing process. The number of good chips obtained from a wafer determines the yield. As can be appreciated, the cost of chips that must be discarded because of a defect must be amortized over the remaining usable chips.
A single semiconductor chip can require numerous process steps such as oxidation, etching, metallization, ion implantation, thermal annealing, and wet chemical cleaning. These are just a few of the many types of process steps involved in the manufacture of a semiconductor chip. Some of these process steps involve placing the wafer on which the semiconductor chips are being manufactured into different tools during the manufacturing process. The optimization of each of these process steps requires an understanding of a variety of chemical reactions and physical processes in order to produce high performance, high yield circuits. The ability to view and characterize the surface and interface layers of a semiconductor chip in terms of their morphology, chemical composition and distribution is an invaluable aid to those involved in research and development, process, problem solving, and failure analysis of integrated circuits. A major part of the analysis process is to determine if defects are caused by one of the process tools, and if so, which tool caused the defects.
As the wafer is placed into different tools during manufacture, each of the tools can produce different types of particles that drop onto the wafer and cause defects that have the potential to xe2x80x9ckillxe2x80x9d a die and decrease the yield. In order to develop high yield semiconductor processes and to improve existing ones, it is important to identify the sources of the various particles that cause defects and then to prevent the tools from dropping these particles onto the wafer while the wafers are in the tools.
In order to be able to quickly resolve process or equipment issues in the manufacture of semiconductor products, a great deal of time, effort and money is being expended by semiconductor manufacturers to capture and classify defects encountered in the manufacture of semiconductor products. Once a defect is detected, properly described, and classified, effort can begin to resolve the cause of the defect and to eliminate the cause of the defect. The biggest problem that faced the semiconductor manufacturers and one of the most difficult to solve was the problem associated with the training and maintenance of a cadre of calibrated human inspectors who can classify all types of defects consistently and without error. This problem was mainly caused by unavoidable human inconsistency and as a solution to this problem; Automatic Defect Classification (ADC) systems were developed.
One such system for automatically classifying defects consists of the following methodological sequence. Gather a defect image from a review station. View the defect image and assign values to elemental descriptor terms called predicates that are general descriptors such as roundness, brightness, color, hue, graininess, etc. Assign a classification code to the defect based upon the values of all the predicates. A typical ADC system could have 40 or more quantifiable qualities and properties that can be predicates. Each predicate can have a specified range of values and a typical predicate can have a value assigned to it between 1 and 256. The range of values that can be assigned to a predicate is arbitrary and can be any range of values. In this example, a value of 1 could indicate that none of the value is present and a value of 256 would indicate that the quality represented by the predicate is ideal. For example, a straight line would have a value of 1 for the predicate indicating roundness, whereas a perfect circle would have a value of 256 for the same predicate. The classification code for each defect is determined by the system from the combination of all the predicate values assigned to the defect. The goal of the ADC system is to be able to uniquely describe all the defect types, in such a manner that a single classification code can be assigned to a defect that has been differentiated from all other types of defects. This is accomplished by a system administrator who trains an artificial intelligence system to recognize various combinations and permutations of the 40 or more predicates to assign the same classification code to the same type of defect. This would result in a highly significant statistical confidence in the probability that the defect, and all other defects of the same type or class, would always be assigned the same classification code by the ADC system.
However, another problem soon emerged. This problem is that the classification codes were tool dependent. The classification codes are determined by predicates, however, the predicates are unique to each tool and the associated ADC system that detects, assigns values to the predicates, and assigns a classification code to each defect. As the manufacturing process becomes more complex, different tools are utilized to detect defects and assign classification codes to the defects. Because the predicates are unique to each tool, the accumulated knowledge in each tool/ADC system is only usable by that tool/ADC system. Each new tool whether it is a new model from the same manufacturer or a new tool from a different manufacturer may have different predicates that need to be calibrated.
Due to color and pattern differences at the various layers in the semiconductor manufacturing process a multiplicity of recipes must be maintained for any inspection tool, either scanning or reviewing tools, corresponding to these various layers and patterns. Generally, in order to uniquely identify layers that will be similar enough to lump together for most of these tools, a device/layer designator has been sufficient. Therefore, a naming convention has been used for scan or review recipes which indicate these parameters. Thus an operator could choose the recipe name that corresponds to a particular lot on hand. As can be appreciated, when more than one or no review recipes fit these criteria a major problem occurs.
With the advent of the ADC system described above and other automating features, such as auto-alignment, in conjunction with the long setup time required for ADC, multiple recipes can exist for a certain device/layer. For example, one may have a completely manual recipe that only loads parameters particular to a singular review station, requiring quite a bit of operator intervention before review can begin. Or one may have an auto-align recipe that loads the wafer, aligns it, and drives to the first defect to be inspected. Another case would be a full ADC recipe that does everything automatically, including classifying the selected defects.
In order for a review station to be effective for review one must have a file from a scan tool containing all of the pertinent information about the wafers, including lot number, layer number, date, device, defect location information, and scan tool. With this information, the review tool should be able to ascertain the xe2x80x9cbestxe2x80x9d recipe to use for a given scan or defect file.
Therefore, what is needed is an engine associated with a review station that gives the review station the ability to automatically select the best and latest recipe for review based on device/layer information contained in the defect file. This will ensure that the review station uses the best (most developed) recipe for any given lot in order that the review station conducts the most accurate review possible.
According to the present invention, the foregoing and other objects and advantages are achieved by a method of manufacturing a production lot of wafers wherein a computer generated list of appropriate review recipes for each layer is available to be used by a review station to review defects on each layer.
In accordance with an aspect of the present invention, the most appropriate review recipe is used by the review station unless a review station operator selects an alternate review recipe.
In accordance with another aspect of the present invention, a production lot of wafers is processed through a manufacturing process, processing a layer of the production lot of wafers, scanning the layer of a selected wafer for defects and reviewing selected defects from the selected wafer using a review tools using the selected review recipe.
The described method of manufacturing semiconductor wafers ensures that the most appropriate review recipe is used to review the defects on each layer thus ensuring that the most accurate analysis is made for each layer.
The present invention is better understood upon consideration of the detailed description below, in conjunction with the accompanying drawings. As will become readily apparent to those skilled in the art from the following description, there is shown and described an embodiment of this invention simply by way of illustration of the best mode to carry out the invention. As will be realized, the invention is capable of other embodiments and its several details are capable of modifications in various obvious aspects, all without departing from the scope of the invention. Accordingly, the drawings and detailed description will be regarded as illustrative in nature and not as restrictive.